Assistant ProfessorSchool of Electrical Engineering & Computer Science (SEECS),
National University of Sciences & Technology (NUST),
Sector H-12, Islamabad 44000,
I am the lab director of System Analysis and Verification (SAVe) Lab at NUST SEECS. My main research interests include Formal Verification, Interactive Theorem Proving and Higher-order Logic. Prior to joining NUST SEECS, I did my PhD and post-doctoral fellowship from the Hardware verification group at Concordia University, Montreal Canada under the supervision of Dr. Sofiène Tahar. The topic of my PhD thesis was Formal Probabilistic Analysis using Theorem Proving.